Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	666	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5491	1			T2	2		T35	14		T7	7
len_601_800	12339	1			T2	9		T3	5		T35	16
len_401_600	8302	1			T2	2		T3	2		T35	15
len_201_400	16490	1			T2	1		T3	2		T37	251
len_65_200	74069	1			T37	680		T35	4		T7	2
len_min_for_xof_require_squeeze	1004	1			T37	10		T88	9		T115	10
len_keccak_block_sizes[72]	773	1			T37	5		T88	9		T115	5
len_keccak_block_sizes[104]	753	1			T37	5		T17	1		T88	9
len_keccak_block_sizes[136]	750	1			T37	5		T22	1		T88	9
len_keccak_block_sizes[144]	281	1			T37	5		T115	5		T185	1
len_keccak_block_sizes[168]	284	1			T37	5		T15	2		T115	5
len_datapath_width	14243	1			T2	1		T3	1		T21	246
len_2_63	214306	1			T2	9		T36	310		T37	1329
len_1	67	1			T15	1		T185	3		T16	2