Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	609	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5470	1			T35	24		T6	30		T9	12
len_601_800	12162	1			T35	58		T6	57		T9	33
len_401_600	8176	1			T35	49		T6	45		T9	24
len_201_400	16194	1			T35	17		T6	16		T9	11
len_65_200	72912	1			T3	685		T35	13		T6	41
len_min_for_xof_require_squeeze	1001	1			T3	9		T35	1		T50	9
len_keccak_block_sizes[72]	731	1			T3	9		T50	9		T9	1
len_keccak_block_sizes[104]	741	1			T3	9		T6	1		T50	9
len_keccak_block_sizes[136]	743	1			T3	9		T50	9		T10	1
len_keccak_block_sizes[144]	280	1			T6	1		T68	5		T197	5
len_keccak_block_sizes[168]	282	1			T68	5		T23	1		T197	5
len_datapath_width	14221	1			T3	9		T21	3		T6	22
len_2_63	211084	1			T3	1643		T16	310		T21	6
len_1	51	1			T35	1		T10	1		T41	1