Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8979	1			T3	19		T34	38		T35	38
len_5001_7500	14458	1			T3	18		T33	33		T34	36
len_2501_5000	9281	1			T3	18		T33	34		T34	36
len_1025_2500	5435	1			T3	11		T33	20		T34	22
len_769_1024	6360	1			T2	19		T3	2		T7	23
len_513_768	6719	1			T2	28		T3	2		T7	36
len_257_512	21189	1			T2	29		T3	2		T7	25
len_0_256	258647	1			T2	21		T3	274		T17	9
len_keccak_block_sizes[72]	728	1			T3	2		T7	1		T33	2
len_keccak_block_sizes[104]	624	1			T3	2		T34	3		T35	3
len_keccak_block_sizes[136]	531	1			T3	2		T34	3		T35	3
len_keccak_block_sizes[144]	416	1			T34	3		T35	3		T68	3
len_keccak_block_sizes[168]	321	1			T2	1		T7	1		T34	3
len_1	760	1			T3	2		T33	2		T34	3
len_0	1223	1			T3	2		T33	2		T34	3