Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	692	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5575	1			T2	16		T7	20		T19	13
len_601_800	12582	1			T2	37		T7	42		T19	70
len_401_600	8358	1			T2	24		T7	28		T19	27
len_201_400	16648	1			T2	12		T7	12		T34	251
len_65_200	74044	1			T2	4		T7	5		T34	680
len_min_for_xof_require_squeeze	1011	1			T7	1		T34	10		T35	10
len_keccak_block_sizes[72]	754	1			T34	5		T35	5		T61	2
len_keccak_block_sizes[104]	751	1			T34	5		T35	5		T72	1
len_keccak_block_sizes[136]	752	1			T34	5		T35	5		T61	1
len_keccak_block_sizes[144]	288	1			T34	5		T35	5		T68	5
len_keccak_block_sizes[168]	288	1			T34	5		T35	5		T68	5
len_datapath_width	14266	1			T2	1		T17	3		T33	246
len_2_63	214686	1			T2	33		T3	374		T17	6
len_1	62	1			T212	1		T213	1		T214	1