Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10235	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8946	1			T2	24		T37	5		T38	19
len_5001_7500	14136	1			T2	49		T37	12		T38	18
len_2501_5000	9163	1			T2	7		T37	2		T38	18
len_1025_2500	5332	1			T2	6		T37	1		T38	11
len_769_1024	6215	1			T38	2		T39	4		T40	4
len_513_768	6443	1			T38	2		T39	3		T40	4
len_257_512	20718	1			T2	1		T38	2		T39	4
len_0_256	254459	1			T1	179		T2	8		T3	9
len_keccak_block_sizes[72]	716	1			T38	2		T39	2		T40	3
len_keccak_block_sizes[104]	609	1			T38	2		T40	3		T45	2
len_keccak_block_sizes[136]	513	1			T38	2		T40	3		T117	3
len_keccak_block_sizes[144]	418	1			T40	3		T9	1		T117	3
len_keccak_block_sizes[168]	321	1			T40	3		T117	3		T119	3
len_1	737	1			T1	1		T38	2		T39	2
len_0	1197	1			T1	5		T2	2		T37	1