Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10323	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9016	1			T1	19		T7	14		T35	38
len_5001_7500	14650	1			T1	18		T7	41		T35	36
len_2501_5000	9301	1			T1	18		T7	11		T35	36
len_1025_2500	5440	1			T1	11		T7	5		T35	22
len_769_1024	6572	1			T1	2		T2	28		T7	57
len_513_768	6933	1			T1	2		T2	31		T7	72
len_257_512	21386	1			T1	2		T2	25		T7	55
len_0_256	258270	1			T1	274		T2	25		T7	173
len_keccak_block_sizes[72]	724	1			T1	2		T35	3		T36	3
len_keccak_block_sizes[104]	622	1			T1	2		T7	1		T35	3
len_keccak_block_sizes[136]	520	1			T1	2		T35	3		T36	3
len_keccak_block_sizes[144]	433	1			T35	3		T20	1		T36	3
len_keccak_block_sizes[168]	322	1			T35	3		T36	3		T21	1
len_1	756	1			T1	2		T35	3		T34	4
len_0	1195	1			T1	2		T7	2		T35	3