Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	658	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5821	1			T2	14		T7	63		T20	27
len_601_800	13165	1			T2	38		T7	126		T20	59
len_401_600	8625	1			T2	32		T7	76		T20	36
len_201_400	16621	1			T2	11		T7	29		T35	251
len_65_200	74230	1			T2	7		T7	35		T35	680
len_min_for_xof_require_squeeze	997	1			T35	10		T36	9		T37	1
len_keccak_block_sizes[72]	755	1			T35	5		T34	1		T36	9
len_keccak_block_sizes[104]	753	1			T35	5		T34	2		T36	9
len_keccak_block_sizes[136]	760	1			T2	1		T35	5		T20	1
len_keccak_block_sizes[144]	287	1			T35	5		T20	1		T34	1
len_keccak_block_sizes[168]	285	1			T7	1		T35	5		T34	1
len_datapath_width	14052	1			T2	1		T7	20		T35	5
len_2_63	214405	1			T1	374		T2	4		T7	104
len_1	58	1			T34	1		T118	2		T181	4