Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10351	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9296	1			T3	23		T17	38		T34	30
len_5001_7500	15040	1			T3	46		T17	36		T34	30
len_2501_5000	9300	1			T3	11		T17	36		T34	30
len_1025_2500	5451	1			T3	7		T17	22		T34	16
len_769_1024	6124	1			T17	4		T34	4		T35	4
len_513_768	6465	1			T3	2		T17	4		T34	2
len_257_512	20940	1			T3	1		T17	52		T34	244
len_0_256	256161	1			T2	97		T3	11		T17	2017
len_keccak_block_sizes[72]	712	1			T17	3		T34	3		T35	2
len_keccak_block_sizes[104]	617	1			T17	3		T34	3		T36	2
len_keccak_block_sizes[136]	531	1			T17	3		T34	3		T36	2
len_keccak_block_sizes[144]	431	1			T17	3		T34	3		T36	2
len_keccak_block_sizes[168]	325	1			T17	3		T34	3		T37	3
len_1	744	1			T2	1		T17	3		T34	3
len_0	1197	1			T2	4		T3	2		T17	3