Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	689	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5604	1			T3	16		T7	4		T8	2
len_601_800	12738	1			T3	36		T7	9		T8	4
len_401_600	8522	1			T3	24		T7	6		T8	4
len_201_400	16662	1			T3	10		T17	251		T7	1
len_65_200	73292	1			T2	51		T3	6		T17	680
len_min_for_xof_require_squeeze	998	1			T17	10		T34	9		T37	9
len_keccak_block_sizes[72]	738	1			T17	5		T34	9		T37	9
len_keccak_block_sizes[104]	755	1			T17	5		T34	9		T37	9
len_keccak_block_sizes[136]	748	1			T2	1		T17	5		T34	9
len_keccak_block_sizes[144]	265	1			T17	5		T180	5		T181	5
len_keccak_block_sizes[168]	275	1			T2	1		T17	5		T7	1
len_datapath_width	13478	1			T2	2		T3	2		T17	5
len_2_63	213460	1			T2	43		T3	6		T17	1329
len_1	43	1			T2	1		T66	1		T182	1