Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	647	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5396	1			T3	65		T36	27		T37	11
len_601_800	12480	1			T3	122		T36	59		T37	14
len_401_600	8150	1			T3	88		T36	41		T37	9
len_201_400	16349	1			T3	45		T36	24		T37	2
len_65_200	73793	1			T3	34		T36	16		T37	5
len_min_for_xof_require_squeeze	998	1			T36	1		T38	10		T58	1
len_keccak_block_sizes[72]	752	1			T3	1		T38	5		T86	9
len_keccak_block_sizes[104]	754	1			T3	2		T38	5		T86	9
len_keccak_block_sizes[136]	750	1			T38	5		T86	9		T196	1
len_keccak_block_sizes[144]	277	1			T38	5		T51	1		T197	5
len_keccak_block_sizes[168]	275	1			T38	5		T58	1		T198	1
len_datapath_width	14065	1			T3	8		T15	3		T35	3
len_2_63	213693	1			T1	16		T2	390		T3	88
len_1	46	1			T3	3		T196	3		T155	1