Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10177	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8976	1			T2	19		T30	40		T31	17
len_5001_7500	14445	1			T2	18		T30	88		T31	17
len_2501_5000	9206	1			T2	18		T30	16		T31	17
len_1025_2500	5407	1			T2	11		T30	13		T31	10
len_769_1024	5598	1			T2	2		T3	9		T30	1
len_513_768	5744	1			T2	2		T3	5		T30	5
len_257_512	20100	1			T2	2		T3	5		T30	4
len_0_256	251778	1			T1	7		T2	274		T3	8
len_keccak_block_sizes[72]	714	1			T2	2		T31	2		T32	2
len_keccak_block_sizes[104]	613	1			T2	2		T31	2		T32	2
len_keccak_block_sizes[136]	516	1			T2	2		T31	2		T34	3
len_keccak_block_sizes[144]	412	1			T31	2		T34	3		T35	2
len_keccak_block_sizes[168]	309	1			T34	3		T195	3		T193	3
len_1	740	1			T2	2		T31	2		T32	2
len_0	1170	1			T1	1		T2	2		T30	4