Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
311778 |
1 |
|
|
T1 |
2 |
|
T2 |
2 |
|
T15 |
2 |
auto[1] |
375386 |
1 |
|
|
T1 |
4672 |
|
T15 |
4672 |
|
T7 |
284 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
172215 |
1 |
|
|
T1 |
1158 |
|
T15 |
1185 |
|
T16 |
16 |
lower_val |
170616 |
1 |
|
|
T1 |
1089 |
|
T2 |
1 |
|
T15 |
1146 |
zero_val |
1800 |
1 |
|
|
T1 |
9 |
|
T2 |
1 |
|
T15 |
3 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
249276 |
1 |
|
|
T1 |
1230 |
|
T2 |
2 |
|
T15 |
1162 |
lower_val |
250294 |
1 |
|
|
T1 |
1176 |
|
T15 |
1230 |
|
T16 |
26 |
zero_val |
187594 |
1 |
|
|
T1 |
2268 |
|
T15 |
2282 |
|
T7 |
134 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
39195 |
1 |
|
|
T16 |
9 |
|
T18 |
48 |
|
T33 |
1 |
higher_val |
higher_val |
auto[1] |
23119 |
1 |
|
|
T1 |
293 |
|
T15 |
304 |
|
T7 |
17 |
higher_val |
lower_val |
auto[0] |
39217 |
1 |
|
|
T16 |
7 |
|
T18 |
52 |
|
T33 |
1 |
higher_val |
lower_val |
auto[1] |
23650 |
1 |
|
|
T1 |
307 |
|
T15 |
320 |
|
T7 |
19 |
higher_val |
zero_val |
auto[0] |
91 |
1 |
|
|
T15 |
1 |
|
T7 |
3 |
|
T134 |
1 |
higher_val |
zero_val |
auto[1] |
46943 |
1 |
|
|
T1 |
558 |
|
T15 |
560 |
|
T7 |
28 |
lower_val |
higher_val |
auto[0] |
38708 |
1 |
|
|
T2 |
1 |
|
T16 |
10 |
|
T18 |
46 |
lower_val |
higher_val |
auto[1] |
23534 |
1 |
|
|
T1 |
292 |
|
T15 |
285 |
|
T7 |
20 |
lower_val |
lower_val |
auto[0] |
38112 |
1 |
|
|
T16 |
7 |
|
T18 |
44 |
|
T33 |
1 |
lower_val |
lower_val |
auto[1] |
23481 |
1 |
|
|
T1 |
283 |
|
T15 |
285 |
|
T7 |
16 |
lower_val |
zero_val |
auto[0] |
80 |
1 |
|
|
T7 |
1 |
|
T8 |
1 |
|
T178 |
1 |
lower_val |
zero_val |
auto[1] |
46701 |
1 |
|
|
T1 |
514 |
|
T15 |
576 |
|
T7 |
29 |
zero_val |
higher_val |
auto[0] |
520 |
1 |
|
|
T2 |
1 |
|
T16 |
1 |
|
T18 |
1 |
zero_val |
higher_val |
auto[1] |
154 |
1 |
|
|
T1 |
2 |
|
T15 |
1 |
|
T7 |
1 |
zero_val |
lower_val |
auto[0] |
523 |
1 |
|
|
T1 |
1 |
|
T35 |
5 |
|
T7 |
1 |
zero_val |
lower_val |
auto[1] |
155 |
1 |
|
|
T1 |
6 |
|
T15 |
1 |
|
T7 |
1 |
zero_val |
zero_val |
auto[0] |
232 |
1 |
|
|
T15 |
1 |
|
T40 |
1 |
|
T8 |
1 |
zero_val |
zero_val |
auto[1] |
216 |
1 |
|
|
T7 |
1 |
|
T179 |
2 |
|
T13 |
1 |