Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10229	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8657	1			T1	30		T15	30		T35	30
len_5001_7500	13778	1			T1	30		T15	30		T35	30
len_2501_5000	9011	1			T1	30		T15	30		T35	30
len_1025_2500	5299	1			T1	16		T15	16		T35	16
len_769_1024	6293	1			T1	4		T15	4		T16	5
len_513_768	6617	1			T1	2		T15	2		T16	9
len_257_512	20981	1			T1	244		T15	244		T16	5
len_0_256	255942	1			T1	1897		T15	1897		T16	5
len_keccak_block_sizes[72]	709	1			T1	3		T15	3		T35	3
len_keccak_block_sizes[104]	620	1			T1	3		T15	3		T35	3
len_keccak_block_sizes[136]	515	1			T1	3		T15	3		T35	3
len_keccak_block_sizes[144]	416	1			T1	3		T15	3		T18	1
len_keccak_block_sizes[168]	322	1			T1	3		T15	3		T18	1
len_1	730	1			T1	3		T15	3		T35	3
len_0	1159	1			T1	3		T15	3		T35	3