Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10257	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8964	1			T1	5		T2	19		T32	36
len_5001_7500	14279	1			T1	10		T2	48		T32	62
len_2501_5000	9162	1			T1	1		T2	14		T32	12
len_1025_2500	5368	1			T1	1		T2	4		T32	10
len_769_1024	6226	1			T1	5		T2	2		T32	1
len_513_768	6569	1			T1	6		T2	2		T32	2
len_257_512	21232	1			T1	4		T2	2		T32	1
len_0_256	256559	1			T1	36		T2	14		T3	9
len_keccak_block_sizes[72]	717	1			T33	2		T34	2		T35	3
len_keccak_block_sizes[104]	614	1			T33	2		T34	2		T35	3
len_keccak_block_sizes[136]	516	1			T33	2		T34	2		T35	3
len_keccak_block_sizes[144]	415	1			T33	2		T34	2		T35	3
len_keccak_block_sizes[168]	327	1			T35	3		T20	1		T177	3
len_1	739	1			T33	2		T34	2		T35	3
len_0	1238	1			T1	3		T2	2		T32	5