Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	743	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5391	1			T1	4		T2	19		T32	23
len_601_800	12660	1			T1	21		T2	42		T32	50
len_401_600	8242	1			T1	15		T2	21		T32	31
len_201_400	16516	1			T1	2		T2	8		T32	17
len_65_200	73918	1			T1	6		T2	5		T32	4
len_min_for_xof_require_squeeze	1001	1			T35	10		T20	1		T15	1
len_keccak_block_sizes[72]	747	1			T35	5		T177	5		T178	9
len_keccak_block_sizes[104]	757	1			T35	5		T15	1		T177	5
len_keccak_block_sizes[136]	742	1			T35	5		T177	5		T178	9
len_keccak_block_sizes[144]	291	1			T35	5		T177	5		T57	1
len_keccak_block_sizes[168]	284	1			T35	5		T177	5		T179	1
len_datapath_width	13837	1			T1	6		T2	2		T3	3
len_2_63	212470	1			T1	23		T2	4		T3	6
len_1	60	1			T15	1		T180	1		T147	1