Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10296	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8848	1			T35	38		T42	30		T7	21
len_5001_7500	13968	1			T35	36		T40	33		T42	30
len_2501_5000	9090	1			T35	36		T40	34		T42	30
len_1025_2500	5314	1			T35	22		T40	20		T42	16
len_769_1024	5697	1			T2	3		T35	4		T40	4
len_513_768	6066	1			T2	4		T35	4		T40	3
len_257_512	20548	1			T2	2		T35	52		T40	4
len_0_256	254290	1			T2	5		T3	9		T18	156
len_keccak_block_sizes[72]	716	1			T35	3		T40	2		T42	3
len_keccak_block_sizes[104]	622	1			T35	3		T42	3		T46	2
len_keccak_block_sizes[136]	519	1			T35	3		T42	3		T46	2
len_keccak_block_sizes[144]	417	1			T35	3		T42	3		T46	2
len_keccak_block_sizes[168]	322	1			T35	3		T42	3		T70	3
len_1	743	1			T35	3		T40	2		T42	3
len_0	1168	1			T18	3		T35	3		T40	2