Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10284	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9157	1			T2	17		T3	38		T34	19
len_5001_7500	14727	1			T2	17		T3	87		T34	18
len_2501_5000	9173	1			T2	17		T3	14		T34	18
len_1025_2500	5354	1			T2	10		T3	10		T34	11
len_769_1024	6178	1			T1	5		T2	2		T3	2
len_513_768	6591	1			T1	5		T2	2		T3	1
len_257_512	21201	1			T2	2		T3	1		T34	2
len_0_256	254985	1			T1	3		T2	290		T3	20
len_keccak_block_sizes[72]	717	1			T2	2		T34	2		T35	2
len_keccak_block_sizes[104]	613	1			T2	2		T34	2		T35	2
len_keccak_block_sizes[136]	521	1			T2	2		T34	2		T35	2
len_keccak_block_sizes[144]	426	1			T2	2		T49	3		T197	3
len_keccak_block_sizes[168]	316	1			T49	3		T197	3		T38	1
len_1	747	1			T2	2		T34	2		T35	2
len_0	1210	1			T2	2		T3	6		T34	2