Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	679	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5286	1			T1	27		T2	12		T7	5
len_601_800	11933	1			T1	57		T2	30		T7	6
len_401_600	7909	1			T1	37		T2	18		T7	11
len_201_400	15854	1			T1	25		T2	9		T7	7
len_65_200	72489	1			T1	28		T2	2		T7	2
len_min_for_xof_require_squeeze	974	1			T48	1		T14	1		T85	9
len_keccak_block_sizes[72]	752	1			T48	1		T85	9		T87	9
len_keccak_block_sizes[104]	751	1			T1	1		T48	1		T85	9
len_keccak_block_sizes[136]	743	1			T34	1		T85	9		T87	9
len_keccak_block_sizes[144]	277	1			T62	1		T63	1		T108	1
len_keccak_block_sizes[168]	268	1			T48	1		T14	1		T194	5
len_datapath_width	14057	1			T1	9		T2	1		T32	3
len_2_63	211670	1			T1	42		T2	54		T3	374
len_1	59	1			T38	1		T14	1		T90	1