Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::state_read_mask_cg

Group : kmac_env_pkg::kmac_env_cov::state_read_mask_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00
Crosses	8	0	8	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
share	2	0	2	100.00	100	1	1	2
state_read_mask	4	0	4	100.00	100	1	1	0

Crosses for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
state_mask_share_cross	8	0	8	100.00	100	1	1	0

Summary for Variable share

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for share

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

10695845

1

T1

2992

T3

3936

T36

7219

auto[1]

10695825

1

T1

2992

T3

3936

T36

7219

---

Summary for Variable state_read_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	4	0	4	100.00

User Defined Bins for state_read_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	21154590	1			T1	5984		T3	7872		T36	14374
triple_byte_access	78840	1			T36	20		T37	74		T39	620
halfword_access	79574	1			T36	20		T37	60		T39	632
byte_access	78666	1			T36	24		T37	60		T39	620

---

Summary for Cross state_mask_share_cross

Samples crossed: share state_read_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	8	0	8	100.00

Automatically Generated Cross Bins for state_mask_share_cross

Bins

share	state_read_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	10577305	1			T1	2992		T3	3936		T36	7187
auto[0]	triple_byte_access	39420	1			T36	10		T37	37		T39	310
auto[0]	halfword_access	39787	1			T36	10		T37	30		T39	316
auto[0]	byte_access	39333	1			T36	12		T37	30		T39	310
auto[1]	word_access	10577285	1			T1	2992		T3	3936		T36	7187
auto[1]	triple_byte_access	39420	1			T36	10		T37	37		T39	310
auto[1]	halfword_access	39787	1			T36	10		T37	30		T39	316
auto[1]	byte_access	39333	1			T36	12		T37	30		T39	310