Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	652	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5542	1			T26	8		T16	12		T17	27
len_601_800	12259	1			T3	15		T26	39		T16	16
len_401_600	8292	1			T3	6		T26	28		T16	13
len_201_400	16402	1			T3	2		T26	17		T16	5
len_65_200	73712	1			T3	3		T26	11		T69	685
len_min_for_xof_require_squeeze	998	1			T69	9		T66	10		T96	9
len_keccak_block_sizes[72]	751	1			T69	9		T66	5		T96	9
len_keccak_block_sizes[104]	760	1			T69	9		T66	5		T96	9
len_keccak_block_sizes[136]	756	1			T69	9		T66	5		T96	9
len_keccak_block_sizes[144]	281	1			T66	5		T65	5		T204	1
len_keccak_block_sizes[168]	282	1			T66	5		T65	5		T205	1
len_datapath_width	13974	1			T38	3		T26	1		T67	3
len_2_63	213682	1			T2	390		T3	2		T39	374
len_1	57	1			T26	1		T62	1		T6	1