Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10149	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8587	1			T44	38		T38	17		T34	32
len_5001_7500	13619	1			T44	36		T38	17		T34	85
len_2501_5000	9045	1			T44	36		T38	17		T34	11
len_1025_2500	5295	1			T44	22		T38	10		T34	4
len_769_1024	5959	1			T2	16		T6	18		T19	40
len_513_768	6308	1			T2	29		T6	18		T19	26
len_257_512	20371	1			T2	25		T6	13		T19	36
len_0_256	252225	1			T2	24		T17	9		T6	14
len_keccak_block_sizes[72]	706	1			T44	3		T38	2		T61	3
len_keccak_block_sizes[104]	614	1			T44	3		T38	2		T61	3
len_keccak_block_sizes[136]	507	1			T44	3		T38	2		T61	3
len_keccak_block_sizes[144]	414	1			T7	1		T44	3		T38	2
len_keccak_block_sizes[168]	315	1			T44	3		T31	1		T61	3
len_1	738	1			T44	3		T38	2		T35	2
len_0	1115	1			T44	3		T38	2		T35	1