Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10211 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8915 1 T1 10 T2 41 T34 38
len_5001_7500 14246 1 T1 38 T2 91 T34 36
len_2501_5000 9203 1 T1 3 T2 15 T34 36
len_1025_2500 5385 1 T1 5 T2 16 T34 22
len_769_1024 6195 1 T2 1 T3 2 T34 4
len_513_768 6622 1 T1 1 T2 1 T3 1
len_257_512 21063 1 T1 1 T2 2 T3 2
len_0_256 253400 1 T1 7 T2 17 T3 1
len_keccak_block_sizes[72] 708 1 T34 3 T35 2 T37 3
len_keccak_block_sizes[104] 611 1 T34 3 T35 2 T37 3
len_keccak_block_sizes[136] 522 1 T34 3 T35 2 T9 1
len_keccak_block_sizes[144] 410 1 T34 3 T37 3 T38 3
len_keccak_block_sizes[168] 312 1 T34 3 T37 3 T38 3
len_1 746 1 T34 3 T35 2 T37 3
len_0 1211 1 T2 3 T34 3 T35 2

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