Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	650	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5562	1			T1	11		T2	29		T7	10
len_601_800	12441	1			T1	22		T2	62		T3	1
len_401_600	8324	1			T1	13		T2	40		T3	2
len_201_400	15966	1			T1	11		T2	22		T3	3
len_65_200	72457	1			T1	3		T2	12		T34	680
len_min_for_xof_require_squeeze	992	1			T34	10		T37	10		T38	9
len_keccak_block_sizes[72]	735	1			T34	5		T37	5		T38	9
len_keccak_block_sizes[104]	756	1			T34	5		T37	5		T38	9
len_keccak_block_sizes[136]	734	1			T34	5		T37	5		T38	9
len_keccak_block_sizes[144]	273	1			T34	5		T37	5		T201	5
len_keccak_block_sizes[168]	273	1			T34	5		T37	5		T201	5
len_datapath_width	14067	1			T2	3		T34	5		T8	1
len_2_63	211299	1			T1	4		T2	8		T34	1329
len_1	57	1			T157	1		T202	1		T18	1