Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10235	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9188	1			T1	15		T17	23		T18	17
len_5001_7500	14800	1			T1	35		T17	75		T18	17
len_2501_5000	9255	1			T1	6		T17	14		T18	17
len_1025_2500	5463	1			T1	3		T17	11		T18	10
len_769_1024	6132	1			T1	1		T17	2		T18	2
len_513_768	6514	1			T1	1		T18	2		T7	12
len_257_512	20565	1			T1	1		T17	1		T18	2
len_0_256	255141	1			T1	8		T17	18		T18	290
len_keccak_block_sizes[72]	716	1			T18	2		T8	1		T58	2
len_keccak_block_sizes[104]	614	1			T18	2		T58	2		T36	1
len_keccak_block_sizes[136]	517	1			T18	2		T7	1		T58	2
len_keccak_block_sizes[144]	413	1			T18	2		T58	2		T72	3
len_keccak_block_sizes[168]	331	1			T8	1		T72	3		T14	1
len_1	733	1			T18	2		T58	2		T59	2
len_0	1212	1			T1	1		T17	3		T18	2