Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10237	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8885	1			T1	24		T2	30		T3	24
len_5001_7500	14223	1			T1	24		T2	30		T3	24
len_2501_5000	9084	1			T1	24		T2	30		T3	24
len_1025_2500	5269	1			T1	14		T2	16		T3	14
len_769_1024	6204	1			T1	2		T2	4		T3	2
len_513_768	6483	1			T1	3		T2	2		T3	3
len_257_512	20929	1			T1	2		T2	244		T3	2
len_0_256	254090	1			T1	211		T2	1897		T3	211
len_keccak_block_sizes[72]	705	1			T1	2		T2	3		T3	2
len_keccak_block_sizes[104]	622	1			T1	2		T2	3		T3	2
len_keccak_block_sizes[136]	519	1			T2	3		T37	3		T20	1
len_keccak_block_sizes[144]	424	1			T2	3		T37	3		T44	2
len_keccak_block_sizes[168]	321	1			T2	3		T37	3		T84	3
len_1	750	1			T1	2		T2	3		T3	2
len_0	1167	1			T1	2		T2	3		T3	2