Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	647	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5445	1			T36	14		T7	1		T20	10
len_601_800	12299	1			T36	53		T7	5		T20	39
len_401_600	8264	1			T36	42		T7	5		T20	24
len_201_400	16343	1			T37	251		T36	17		T7	3
len_65_200	72740	1			T2	685		T37	680		T36	7
len_min_for_xof_require_squeeze	996	1			T2	9		T37	10		T41	1
len_keccak_block_sizes[72]	751	1			T2	9		T37	5		T84	5
len_keccak_block_sizes[104]	742	1			T2	9		T37	5		T84	5
len_keccak_block_sizes[136]	734	1			T2	9		T37	5		T36	1
len_keccak_block_sizes[144]	284	1			T37	5		T84	5		T85	5
len_keccak_block_sizes[168]	291	1			T37	5		T84	5		T85	5
len_datapath_width	13538	1			T2	9		T37	5		T34	3
len_2_63	211326	1			T1	310		T2	1643		T3	310
len_1	57	1			T91	1		T175	1		T224	1