Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10323 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8975 1 T1 24 T2 9 T3 30
len_5001_7500 14281 1 T1 24 T2 43 T3 30
len_2501_5000 9297 1 T1 24 T2 8 T3 30
len_1025_2500 5392 1 T1 14 T2 7 T3 16
len_769_1024 6063 1 T1 2 T2 18 T3 4
len_513_768 6634 1 T1 3 T2 18 T3 2
len_257_512 21174 1 T1 2 T2 27 T3 244
len_0_256 257339 1 T1 211 T2 120 T3 1897
len_keccak_block_sizes[72] 720 1 T1 2 T3 3 T34 3
len_keccak_block_sizes[104] 625 1 T1 2 T3 3 T34 3
len_keccak_block_sizes[136] 520 1 T3 3 T34 3 T35 3
len_keccak_block_sizes[144] 421 1 T3 3 T34 3 T35 3
len_keccak_block_sizes[168] 321 1 T3 3 T34 3 T35 3
len_1 745 1 T1 2 T3 3 T34 3
len_0 1252 1 T1 2 T2 6 T3 3

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