Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	667	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5286	1			T2	24		T9	16		T18	1
len_601_800	12438	1			T2	69		T8	3		T9	40
len_401_600	8235	1			T2	45		T8	1		T9	23
len_201_400	16433	1			T2	20		T35	251		T9	11
len_65_200	73818	1			T2	38		T3	685		T32	63
len_min_for_xof_require_squeeze	995	1			T3	9		T34	9		T35	10
len_keccak_block_sizes[72]	766	1			T2	1		T3	9		T32	2
len_keccak_block_sizes[104]	760	1			T2	1		T3	9		T32	2
len_keccak_block_sizes[136]	746	1			T3	9		T34	9		T35	5
len_keccak_block_sizes[144]	296	1			T35	5		T58	1		T191	5
len_keccak_block_sizes[168]	277	1			T2	1		T35	5		T143	1
len_datapath_width	14107	1			T2	8		T3	9		T32	5
len_2_63	213682	1			T1	310		T2	92		T3	1643
len_1	68	1			T2	1		T32	1		T143	1