Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10322	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8792	1			T1	38		T30	24		T31	38
len_5001_7500	13973	1			T1	36		T30	24		T31	36
len_2501_5000	9135	1			T1	36		T30	24		T31	36
len_1025_2500	5362	1			T1	22		T30	14		T31	22
len_769_1024	5974	1			T1	4		T2	20		T3	22
len_513_768	6311	1			T1	4		T2	19		T3	23
len_257_512	20853	1			T1	52		T2	37		T3	17
len_0_256	256861	1			T1	2017		T2	25		T3	22
len_keccak_block_sizes[72]	717	1			T1	3		T2	1		T30	2
len_keccak_block_sizes[104]	619	1			T1	3		T30	2		T31	3
len_keccak_block_sizes[136]	513	1			T1	3		T31	3		T33	2
len_keccak_block_sizes[144]	426	1			T1	3		T31	3		T51	2
len_keccak_block_sizes[168]	325	1			T1	3		T3	1		T31	3
len_1	749	1			T1	3		T30	2		T31	3
len_0	1204	1			T1	3		T30	2		T31	3