Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	644	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5120	1			T2	15		T3	15		T7	4
len_601_800	11672	1			T2	39		T3	33		T7	13
len_401_600	7753	1			T2	21		T3	19		T7	7
len_201_400	16235	1			T1	251		T2	15		T3	10
len_65_200	73791	1			T1	680		T2	2		T3	2
len_min_for_xof_require_squeeze	993	1			T1	10		T31	10		T198	10
len_keccak_block_sizes[72]	756	1			T1	5		T31	5		T94	1
len_keccak_block_sizes[104]	763	1			T1	5		T31	5		T94	1
len_keccak_block_sizes[136]	761	1			T1	5		T31	5		T94	1
len_keccak_block_sizes[144]	283	1			T1	5		T31	5		T94	1
len_keccak_block_sizes[168]	283	1			T1	5		T31	5		T94	1
len_datapath_width	13991	1			T1	5		T3	2		T7	1
len_2_63	213222	1			T1	1329		T2	36		T3	60
len_1	46	1			T151	1		T154	2		T48	1