Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10242 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 8790 1 T2 38 T3 17 T34 24
len_5001_7500 14025 1 T2 36 T3 40 T34 24
len_2501_5000 9030 1 T2 36 T3 3 T34 24
len_1025_2500 5334 1 T2 22 T3 2 T34 14
len_769_1024 6111 1 T1 31 T2 4 T3 1
len_513_768 6543 1 T1 37 T2 4 T3 2
len_257_512 20874 1 T1 46 T2 52 T34 2
len_0_256 253369 1 T1 34 T2 2017 T3 10
len_keccak_block_sizes[72] 709 1 T2 3 T34 2 T37 2
len_keccak_block_sizes[104] 609 1 T2 3 T34 2 T37 2
len_keccak_block_sizes[136] 519 1 T2 3 T7 1 T37 2
len_keccak_block_sizes[144] 414 1 T2 3 T40 3 T44 1
len_keccak_block_sizes[168] 307 1 T2 3 T40 3 T198 3
len_1 744 1 T2 3 T34 2 T37 2
len_0 1162 1 T2 3 T3 2 T34 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%