Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10297	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8907	1			T2	30		T34	30		T36	19
len_5001_7500	14264	1			T2	30		T34	30		T36	18
len_2501_5000	9179	1			T2	30		T34	30		T36	18
len_1025_2500	5374	1			T2	16		T34	16		T36	11
len_769_1024	5956	1			T2	4		T34	4		T36	2
len_513_768	6317	1			T2	2		T3	3		T34	2
len_257_512	20776	1			T2	244		T3	3		T34	244
len_0_256	254162	1			T2	1897		T17	9		T34	1897
len_keccak_block_sizes[72]	716	1			T2	3		T34	3		T36	2
len_keccak_block_sizes[104]	626	1			T2	3		T34	3		T36	2
len_keccak_block_sizes[136]	521	1			T2	3		T34	3		T36	2
len_keccak_block_sizes[144]	421	1			T2	3		T34	3		T135	3
len_keccak_block_sizes[168]	323	1			T2	3		T34	3		T8	1
len_1	754	1			T2	3		T34	3		T36	2
len_0	1167	1			T2	3		T34	3		T36	2