Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	655	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5360	1			T3	3		T21	3		T8	21
len_601_800	11999	1			T3	2		T21	11		T8	39
len_401_600	7856	1			T21	2		T8	16		T9	39
len_201_400	16055	1			T21	2		T8	12		T9	25
len_65_200	72651	1			T2	685		T34	685		T21	1
len_min_for_xof_require_squeeze	993	1			T2	9		T34	9		T135	9
len_keccak_block_sizes[72]	740	1			T2	9		T34	9		T135	9
len_keccak_block_sizes[104]	761	1			T2	9		T34	9		T154	2
len_keccak_block_sizes[136]	746	1			T2	9		T34	9		T135	9
len_keccak_block_sizes[144]	279	1			T150	1		T195	5		T196	5
len_keccak_block_sizes[168]	280	1			T150	1		T195	5		T196	5
len_datapath_width	13895	1			T2	9		T17	3		T34	9
len_2_63	211698	1			T2	1643		T3	8		T17	6
len_1	45	1			T154	1		T150	1		T179	1