Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
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Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 14 0 14 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
output_digest_len 14 0 14 100.00 100 1 1 0


Summary for Variable output_digest_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 14 0 14 100.00


User Defined Bins for output_digest_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 633 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_801_1000 5329 1 T7 16 T8 8 T9 31
len_601_800 12388 1 T7 42 T8 21 T9 64
len_401_600 8148 1 T7 20 T8 21 T9 42
len_201_400 16401 1 T34 251 T7 9 T8 9
len_65_200 73141 1 T34 680 T7 5 T8 6
len_min_for_xof_require_squeeze 1002 1 T34 10 T74 10 T118 1
len_keccak_block_sizes[72] 733 1 T34 5 T9 2 T74 5
len_keccak_block_sizes[104] 743 1 T34 5 T9 1 T36 1
len_keccak_block_sizes[136] 740 1 T34 5 T74 5 T118 1
len_keccak_block_sizes[144] 277 1 T34 5 T9 1 T74 5
len_keccak_block_sizes[168] 282 1 T34 5 T9 1 T74 5
len_datapath_width 14007 1 T2 3 T34 5 T8 1
len_2_63 212262 1 T1 310 T2 6 T3 374
len_1 51 1 T186 1 T192 1 T193 1

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