Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
329710 |
1 |
|
|
T1 |
2 |
|
T2 |
272 |
|
T3 |
296 |
auto[1] |
358238 |
1 |
|
|
T1 |
298 |
|
T2 |
88 |
|
T33 |
396 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
172583 |
1 |
|
|
T1 |
64 |
|
T2 |
113 |
|
T3 |
73 |
lower_val |
171076 |
1 |
|
|
T1 |
79 |
|
T2 |
88 |
|
T3 |
72 |
zero_val |
1672 |
1 |
|
|
T1 |
3 |
|
T2 |
5 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
254648 |
1 |
|
|
T1 |
74 |
|
T2 |
190 |
|
T3 |
134 |
lower_val |
253950 |
1 |
|
|
T1 |
80 |
|
T2 |
132 |
|
T3 |
162 |
zero_val |
179350 |
1 |
|
|
T1 |
146 |
|
T2 |
38 |
|
T33 |
194 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
41155 |
1 |
|
|
T2 |
45 |
|
T3 |
36 |
|
T7 |
28 |
higher_val |
higher_val |
auto[1] |
22700 |
1 |
|
|
T1 |
17 |
|
T2 |
12 |
|
T33 |
25 |
higher_val |
lower_val |
auto[0] |
41222 |
1 |
|
|
T2 |
35 |
|
T3 |
37 |
|
T7 |
24 |
higher_val |
lower_val |
auto[1] |
22416 |
1 |
|
|
T1 |
13 |
|
T2 |
7 |
|
T33 |
31 |
higher_val |
zero_val |
auto[0] |
77 |
1 |
|
|
T45 |
1 |
|
T38 |
1 |
|
T15 |
1 |
higher_val |
zero_val |
auto[1] |
45013 |
1 |
|
|
T1 |
34 |
|
T2 |
14 |
|
T33 |
58 |
lower_val |
higher_val |
auto[0] |
40670 |
1 |
|
|
T2 |
44 |
|
T3 |
35 |
|
T7 |
21 |
lower_val |
higher_val |
auto[1] |
22593 |
1 |
|
|
T1 |
21 |
|
T2 |
7 |
|
T33 |
31 |
lower_val |
lower_val |
auto[0] |
40706 |
1 |
|
|
T2 |
24 |
|
T3 |
37 |
|
T7 |
19 |
lower_val |
lower_val |
auto[1] |
22419 |
1 |
|
|
T1 |
25 |
|
T2 |
5 |
|
T33 |
19 |
lower_val |
zero_val |
auto[0] |
74 |
1 |
|
|
T1 |
1 |
|
T18 |
1 |
|
T114 |
1 |
lower_val |
zero_val |
auto[1] |
44614 |
1 |
|
|
T1 |
32 |
|
T2 |
8 |
|
T33 |
40 |
zero_val |
higher_val |
auto[0] |
488 |
1 |
|
|
T2 |
2 |
|
T7 |
1 |
|
T34 |
1 |
zero_val |
higher_val |
auto[1] |
131 |
1 |
|
|
T33 |
1 |
|
T36 |
1 |
|
T40 |
1 |
zero_val |
lower_val |
auto[0] |
509 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T33 |
1 |
zero_val |
lower_val |
auto[1] |
106 |
1 |
|
|
T1 |
1 |
|
T36 |
1 |
|
T38 |
1 |
zero_val |
zero_val |
auto[0] |
254 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T17 |
1 |
zero_val |
zero_val |
auto[1] |
184 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T33 |
3 |