Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10291	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9099	1			T2	13		T3	37		T33	43
len_5001_7500	14474	1			T2	14		T3	72		T33	94
len_2501_5000	9129	1			T2	3		T3	15		T33	18
len_1025_2500	5427	1			T2	7		T3	13		T33	13
len_769_1024	5977	1			T1	19		T2	17		T33	1
len_513_768	6416	1			T1	28		T2	31		T3	2
len_257_512	20832	1			T1	21		T2	24		T33	2
len_0_256	255388	1			T1	23		T2	51		T3	9
len_keccak_block_sizes[72]	714	1			T7	1		T35	3		T36	3
len_keccak_block_sizes[104]	610	1			T35	3		T36	3		T68	3
len_keccak_block_sizes[136]	528	1			T1	1		T35	3		T36	3
len_keccak_block_sizes[144]	419	1			T35	3		T36	3		T68	3
len_keccak_block_sizes[168]	318	1			T35	3		T36	3		T37	1
len_1	745	1			T35	3		T36	3		T68	3
len_0	1240	1			T2	1		T33	6		T35	3