Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	645	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5465	1			T1	17		T2	22		T3	29
len_601_800	12263	1			T1	39		T2	40		T3	57
len_401_600	8109	1			T1	18		T2	43		T3	29
len_201_400	16182	1			T1	8		T2	22		T3	16
len_65_200	73417	1			T1	7		T2	16		T3	13
len_min_for_xof_require_squeeze	990	1			T35	9		T36	9		T68	10
len_keccak_block_sizes[72]	745	1			T35	9		T36	9		T68	5
len_keccak_block_sizes[104]	737	1			T35	9		T36	9		T68	5
len_keccak_block_sizes[136]	749	1			T35	9		T36	9		T68	5
len_keccak_block_sizes[144]	284	1			T68	5		T38	1		T110	5
len_keccak_block_sizes[168]	283	1			T68	5		T110	5		T142	2
len_datapath_width	13761	1			T2	4		T3	1		T33	3
len_2_63	212307	1			T1	59		T2	33		T3	1
len_1	60	1			T142	2		T15	1		T191	1