Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10348	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8896	1			T2	21		T7	5		T8	17
len_5001_7500	14209	1			T2	54		T7	15		T8	59
len_2501_5000	9160	1			T2	8		T7	5		T8	13
len_1025_2500	5369	1			T2	1		T7	5		T8	10
len_769_1024	5816	1			T1	1		T2	2		T7	8
len_513_768	6125	1			T1	2		T7	9		T8	10
len_257_512	20781	1			T1	1		T2	2		T7	8
len_0_256	255641	1			T2	15		T7	19		T8	37
len_keccak_block_sizes[72]	729	1			T7	1		T33	3		T14	1
len_keccak_block_sizes[104]	617	1			T33	3		T40	2		T77	2
len_keccak_block_sizes[136]	512	1			T33	3		T14	1		T40	2
len_keccak_block_sizes[144]	425	1			T33	3		T17	1		T36	1
len_keccak_block_sizes[168]	317	1			T33	3		T19	1		T57	1
len_1	751	1			T33	3		T40	2		T77	2
len_0	1132	1			T2	3		T7	1		T33	3