Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10268	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9020	1			T2	38		T3	10		T38	13
len_5001_7500	14284	1			T2	36		T3	30		T37	33
len_2501_5000	9130	1			T2	36		T3	8		T37	34
len_1025_2500	5373	1			T2	22		T3	1		T37	20
len_769_1024	6413	1			T2	4		T7	8		T8	6
len_513_768	6892	1			T2	4		T3	1		T7	11
len_257_512	21182	1			T2	52		T3	2		T7	16
len_0_256	255592	1			T2	2017		T3	6		T7	9
len_keccak_block_sizes[72]	730	1			T2	3		T37	2		T39	2
len_keccak_block_sizes[104]	621	1			T2	3		T39	2		T41	2
len_keccak_block_sizes[136]	523	1			T2	3		T73	3		T74	3
len_keccak_block_sizes[144]	418	1			T2	3		T73	3		T74	3
len_keccak_block_sizes[168]	316	1			T2	3		T73	3		T74	3
len_1	759	1			T2	3		T37	2		T39	2
len_0	1249	1			T2	3		T37	2		T38	1