Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10356	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8924	1			T37	38		T52	30		T7	11
len_5001_7500	14431	1			T20	33		T37	36		T39	5
len_2501_5000	9240	1			T20	34		T37	36		T39	1
len_1025_2500	5409	1			T20	20		T37	22		T39	1
len_769_1024	6193	1			T17	23		T20	4		T37	4
len_513_768	6808	1			T17	25		T20	3		T37	4
len_257_512	21384	1			T17	20		T20	4		T37	52
len_0_256	257707	1			T2	9		T17	22		T20	148
len_keccak_block_sizes[72]	715	1			T20	2		T37	3		T52	3
len_keccak_block_sizes[104]	628	1			T37	3		T52	3		T42	3
len_keccak_block_sizes[136]	518	1			T37	3		T52	3		T42	3
len_keccak_block_sizes[144]	418	1			T37	3		T21	1		T52	3
len_keccak_block_sizes[168]	315	1			T37	3		T52	3		T42	3
len_1	755	1			T20	2		T37	3		T52	3
len_0	1224	1			T20	2		T37	3		T39	1