Summary for Variable share
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for share
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
10670088 | 
1 | 
 | 
 | 
T1 | 
27235 | 
 | 
T2 | 
27235 | 
 | 
T3 | 
27235 | 
| auto[1] | 
10670031 | 
1 | 
 | 
 | 
T1 | 
27235 | 
 | 
T2 | 
27235 | 
 | 
T3 | 
27235 | 
Summary for Variable state_read_mask
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
4 | 
0 | 
4 | 
100.00 | 
User Defined Bins for state_read_mask
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| word_access | 
21101605 | 
1 | 
 | 
 | 
T1 | 
52796 | 
 | 
T2 | 
52796 | 
 | 
T3 | 
52796 | 
| triple_byte_access | 
79386 | 
1 | 
 | 
 | 
T1 | 
558 | 
 | 
T2 | 
558 | 
 | 
T3 | 
558 | 
| halfword_access | 
79738 | 
1 | 
 | 
 | 
T1 | 
558 | 
 | 
T2 | 
558 | 
 | 
T3 | 
558 | 
| byte_access | 
79390 | 
1 | 
 | 
 | 
T1 | 
558 | 
 | 
T2 | 
558 | 
 | 
T3 | 
558 | 
Summary for Cross state_mask_share_cross
Samples crossed: share state_read_mask
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
8 | 
0 | 
8 | 
100.00 | 
 | 
Automatically Generated Cross Bins for state_mask_share_cross
Bins
| share | state_read_mask | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
word_access | 
10550831 | 
1 | 
 | 
 | 
T1 | 
26398 | 
 | 
T2 | 
26398 | 
 | 
T3 | 
26398 | 
| auto[0] | 
triple_byte_access | 
39693 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 | 
| auto[0] | 
halfword_access | 
39869 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 | 
| auto[0] | 
byte_access | 
39695 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 | 
| auto[1] | 
word_access | 
10550774 | 
1 | 
 | 
 | 
T1 | 
26398 | 
 | 
T2 | 
26398 | 
 | 
T3 | 
26398 | 
| auto[1] | 
triple_byte_access | 
39693 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 | 
| auto[1] | 
halfword_access | 
39869 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 | 
| auto[1] | 
byte_access | 
39695 | 
1 | 
 | 
 | 
T1 | 
279 | 
 | 
T2 | 
279 | 
 | 
T3 | 
279 |