Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10256	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8851	1			T2	6		T37	17		T38	30
len_5001_7500	14029	1			T2	11		T37	17		T38	30
len_2501_5000	9124	1			T2	3		T37	17		T38	30
len_1025_2500	5314	1			T2	3		T37	10		T38	16
len_769_1024	6099	1			T1	25		T2	1		T3	2
len_513_768	6554	1			T1	31		T2	1		T3	7
len_257_512	20831	1			T1	27		T2	2		T3	1
len_0_256	253831	1			T1	31		T2	2		T3	1
len_keccak_block_sizes[72]	717	1			T37	2		T38	3		T40	2
len_keccak_block_sizes[104]	613	1			T37	2		T38	3		T40	2
len_keccak_block_sizes[136]	519	1			T1	1		T37	2		T38	3
len_keccak_block_sizes[144]	420	1			T37	2		T38	3		T40	2
len_keccak_block_sizes[168]	320	1			T20	1		T38	3		T121	3
len_1	744	1			T37	2		T20	1		T38	3
len_0	1119	1			T37	2		T38	3		T40	2