Summary for Variable in_app_keymgr
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for in_app_keymgr
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
335352 | 
1 | 
 | 
 | 
T1 | 
197 | 
 | 
T2 | 
29 | 
 | 
T3 | 
16 | 
| auto[1] | 
3184 | 
1 | 
 | 
 | 
T1 | 
27 | 
 | 
T3 | 
1 | 
 | 
T7 | 
13 | 
Summary for Variable kmac_mode
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for kmac_mode
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
302893 | 
1 | 
 | 
 | 
T1 | 
118 | 
 | 
T2 | 
6 | 
 | 
T3 | 
11 | 
| auto[1] | 
35643 | 
1 | 
 | 
 | 
T1 | 
106 | 
 | 
T2 | 
23 | 
 | 
T3 | 
6 | 
Summary for Variable sideload
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for sideload
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
325004 | 
1 | 
 | 
 | 
T1 | 
166 | 
 | 
T2 | 
29 | 
 | 
T3 | 
15 | 
| auto[1] | 
13532 | 
1 | 
 | 
 | 
T1 | 
58 | 
 | 
T3 | 
2 | 
 | 
T7 | 
22 | 
Summary for Cross sideload_cross
Samples crossed: sideload kmac_mode in_app_keymgr
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| User Defined Cross Bins | 
4 | 
0 | 
4 | 
100.00 | 
 | 
User Defined Cross Bins for sideload_cross
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| sw_kmac_valid_sideload | 
13532 | 
1 | 
 | 
 | 
T1 | 
58 | 
 | 
T3 | 
2 | 
 | 
T7 | 
22 | 
| sw_kmac_invalid_sideload | 
325004 | 
1 | 
 | 
 | 
T1 | 
166 | 
 | 
T2 | 
29 | 
 | 
T3 | 
15 | 
| app_valid_sideload | 
13532 | 
1 | 
 | 
 | 
T1 | 
58 | 
 | 
T3 | 
2 | 
 | 
T7 | 
22 | 
| app_invalid_sideload | 
325004 | 
1 | 
 | 
 | 
T1 | 
166 | 
 | 
T2 | 
29 | 
 | 
T3 | 
15 |