Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
355422 |
1 |
|
|
T1 |
2 |
|
T3 |
748 |
|
T17 |
2 |
auto[1] |
335314 |
1 |
|
|
T1 |
346 |
|
T17 |
4528 |
|
T39 |
490 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
172609 |
1 |
|
|
T1 |
80 |
|
T3 |
183 |
|
T17 |
1184 |
lower_val |
171015 |
1 |
|
|
T1 |
82 |
|
T3 |
172 |
|
T17 |
1115 |
zero_val |
1790 |
1 |
|
|
T1 |
3 |
|
T3 |
1 |
|
T17 |
3 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
260994 |
1 |
|
|
T1 |
90 |
|
T3 |
354 |
|
T17 |
1156 |
lower_val |
261324 |
1 |
|
|
T1 |
78 |
|
T3 |
394 |
|
T17 |
1168 |
zero_val |
168418 |
1 |
|
|
T1 |
180 |
|
T17 |
2206 |
|
T39 |
252 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
44285 |
1 |
|
|
T3 |
83 |
|
T39 |
1 |
|
T6 |
19 |
higher_val |
higher_val |
auto[1] |
20987 |
1 |
|
|
T1 |
18 |
|
T17 |
311 |
|
T39 |
35 |
higher_val |
lower_val |
auto[0] |
44202 |
1 |
|
|
T3 |
100 |
|
T6 |
23 |
|
T66 |
68 |
higher_val |
lower_val |
auto[1] |
21074 |
1 |
|
|
T1 |
21 |
|
T17 |
337 |
|
T39 |
20 |
higher_val |
zero_val |
auto[0] |
82 |
1 |
|
|
T47 |
1 |
|
T70 |
1 |
|
T141 |
1 |
higher_val |
zero_val |
auto[1] |
41979 |
1 |
|
|
T1 |
41 |
|
T17 |
536 |
|
T39 |
52 |
lower_val |
higher_val |
auto[0] |
43715 |
1 |
|
|
T3 |
88 |
|
T35 |
1 |
|
T6 |
20 |
lower_val |
higher_val |
auto[1] |
20696 |
1 |
|
|
T1 |
20 |
|
T17 |
263 |
|
T39 |
28 |
lower_val |
lower_val |
auto[0] |
43944 |
1 |
|
|
T3 |
84 |
|
T6 |
22 |
|
T22 |
1 |
lower_val |
lower_val |
auto[1] |
20870 |
1 |
|
|
T1 |
19 |
|
T17 |
282 |
|
T39 |
29 |
lower_val |
zero_val |
auto[0] |
91 |
1 |
|
|
T36 |
1 |
|
T56 |
1 |
|
T42 |
1 |
lower_val |
zero_val |
auto[1] |
41699 |
1 |
|
|
T1 |
43 |
|
T17 |
570 |
|
T39 |
61 |
zero_val |
higher_val |
auto[0] |
551 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T39 |
1 |
zero_val |
higher_val |
auto[1] |
141 |
1 |
|
|
T1 |
1 |
|
T189 |
1 |
|
T14 |
1 |
zero_val |
lower_val |
auto[0] |
531 |
1 |
|
|
T6 |
1 |
|
T22 |
1 |
|
T66 |
1 |
zero_val |
lower_val |
auto[1] |
123 |
1 |
|
|
T189 |
1 |
|
T14 |
1 |
|
T15 |
1 |
zero_val |
zero_val |
auto[0] |
255 |
1 |
|
|
T17 |
1 |
|
T36 |
1 |
|
T56 |
1 |
zero_val |
zero_val |
auto[1] |
189 |
1 |
|
|
T1 |
1 |
|
T17 |
2 |
|
T109 |
2 |