Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10349 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9100 1 T3 19 T17 38 T109 30
len_5001_7500 14262 1 T3 18 T17 36 T39 33
len_2501_5000 9220 1 T3 18 T17 36 T39 34
len_1025_2500 5406 1 T3 11 T17 22 T39 20
len_769_1024 6066 1 T1 27 T3 2 T17 4
len_513_768 6467 1 T1 35 T3 2 T17 4
len_257_512 20964 1 T1 29 T3 2 T17 52
len_0_256 256758 1 T1 32 T3 274 T17 2017
len_keccak_block_sizes[72] 722 1 T3 2 T17 3 T39 2
len_keccak_block_sizes[104] 625 1 T3 2 T17 3 T7 1
len_keccak_block_sizes[136] 515 1 T3 2 T17 3 T7 1
len_keccak_block_sizes[144] 430 1 T17 3 T109 3 T18 1
len_keccak_block_sizes[168] 317 1 T1 1 T17 3 T109 3
len_1 742 1 T3 2 T17 3 T39 2
len_0 1185 1 T3 2 T17 3 T39 2

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