Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	644	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5380	1			T1	31		T6	7		T22	17
len_601_800	12324	1			T1	34		T6	25		T22	39
len_401_600	8139	1			T1	35		T6	12		T22	22
len_201_400	16414	1			T1	13		T17	251		T6	2
len_65_200	73380	1			T1	6		T17	680		T6	1
len_min_for_xof_require_squeeze	999	1			T17	10		T7	1		T57	1
len_keccak_block_sizes[72]	745	1			T17	5		T109	9		T189	5
len_keccak_block_sizes[104]	741	1			T17	5		T22	1		T109	9
len_keccak_block_sizes[136]	744	1			T17	5		T109	9		T189	5
len_keccak_block_sizes[144]	283	1			T17	5		T189	5		T190	1
len_keccak_block_sizes[168]	284	1			T17	5		T7	1		T189	5
len_datapath_width	14077	1			T17	5		T39	246		T35	3
len_2_63	213422	1			T1	52		T3	374		T17	1329
len_1	58	1			T154	1		T14	2		T24	1