Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10210	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8856	1			T1	38		T2	19		T33	17
len_5001_7500	14075	1			T1	36		T2	18		T33	17
len_2501_5000	9127	1			T1	36		T2	18		T33	17
len_1025_2500	5308	1			T1	22		T2	11		T33	10
len_769_1024	6143	1			T1	4		T2	2		T7	20
len_513_768	6577	1			T1	4		T2	2		T3	1
len_257_512	20742	1			T1	52		T2	2		T7	10
len_0_256	253603	1			T1	2017		T2	274		T32	39
len_keccak_block_sizes[72]	699	1			T1	3		T2	2		T33	2
len_keccak_block_sizes[104]	612	1			T1	3		T2	2		T33	2
len_keccak_block_sizes[136]	518	1			T1	3		T2	2		T33	2
len_keccak_block_sizes[144]	417	1			T1	3		T33	2		T36	3
len_keccak_block_sizes[168]	320	1			T1	3		T36	3		T40	3
len_1	741	1			T1	3		T2	2		T32	1
len_0	1162	1			T1	3		T2	2		T33	2