Summary for Variable entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 
2 | 
0 | 
2 | 
100.00 | 
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| auto[0] | 
355290 | 
1 | 
 | 
 | 
T2 | 
2 | 
 | 
T21 | 
82 | 
 | 
T7 | 
314 | 
| auto[1] | 
336858 | 
1 | 
 | 
 | 
T2 | 
778 | 
 | 
T38 | 
4672 | 
 | 
T39 | 
490 | 
Summary for Variable prescaler_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for prescaler_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
173389 | 
1 | 
 | 
 | 
T2 | 
212 | 
 | 
T21 | 
25 | 
 | 
T7 | 
86 | 
| lower_val | 
171387 | 
1 | 
 | 
 | 
T2 | 
186 | 
 | 
T21 | 
12 | 
 | 
T7 | 
81 | 
| zero_val | 
1738 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T21 | 
1 | 
 | 
T7 | 
3 | 
Summary for Variable wait_timer_val
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| User Defined Bins | 
3 | 
0 | 
3 | 
100.00 | 
User Defined Bins for wait_timer_val
Bins
| NAME | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
261774 | 
1 | 
 | 
 | 
T2 | 
182 | 
 | 
T21 | 
46 | 
 | 
T7 | 
162 | 
| lower_val | 
261078 | 
1 | 
 | 
 | 
T2 | 
200 | 
 | 
T21 | 
36 | 
 | 
T7 | 
152 | 
| zero_val | 
169296 | 
1 | 
 | 
 | 
T2 | 
398 | 
 | 
T38 | 
2368 | 
 | 
T39 | 
238 | 
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING | 
| Automatically Generated Cross Bins | 
18 | 
0 | 
18 | 
100.00 | 
 | 
Automatically Generated Cross Bins for entropy_timer_cross
Bins
| prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS |  | TEST | COUNT |  | TEST | COUNT |  | TEST | COUNT | 
| higher_val | 
higher_val | 
auto[0] | 
44555 | 
1 | 
 | 
 | 
T21 | 
15 | 
 | 
T7 | 
40 | 
 | 
T36 | 
52 | 
| higher_val | 
higher_val | 
auto[1] | 
21011 | 
1 | 
 | 
 | 
T2 | 
54 | 
 | 
T38 | 
287 | 
 | 
T39 | 
31 | 
| higher_val | 
lower_val | 
auto[0] | 
44398 | 
1 | 
 | 
 | 
T21 | 
10 | 
 | 
T7 | 
46 | 
 | 
T36 | 
54 | 
| higher_val | 
lower_val | 
auto[1] | 
21244 | 
1 | 
 | 
 | 
T2 | 
52 | 
 | 
T38 | 
312 | 
 | 
T39 | 
28 | 
| higher_val | 
zero_val | 
auto[0] | 
68 | 
1 | 
 | 
 | 
T38 | 
1 | 
 | 
T22 | 
1 | 
 | 
T200 | 
1 | 
| higher_val | 
zero_val | 
auto[1] | 
42113 | 
1 | 
 | 
 | 
T2 | 
106 | 
 | 
T38 | 
620 | 
 | 
T39 | 
58 | 
| lower_val | 
higher_val | 
auto[0] | 
43993 | 
1 | 
 | 
 | 
T21 | 
5 | 
 | 
T7 | 
43 | 
 | 
T36 | 
58 | 
| lower_val | 
higher_val | 
auto[1] | 
20860 | 
1 | 
 | 
 | 
T2 | 
34 | 
 | 
T38 | 
314 | 
 | 
T39 | 
32 | 
| lower_val | 
lower_val | 
auto[0] | 
43764 | 
1 | 
 | 
 | 
T21 | 
7 | 
 | 
T7 | 
38 | 
 | 
T36 | 
42 | 
| lower_val | 
lower_val | 
auto[1] | 
20884 | 
1 | 
 | 
 | 
T2 | 
52 | 
 | 
T38 | 
261 | 
 | 
T39 | 
30 | 
| lower_val | 
zero_val | 
auto[0] | 
67 | 
1 | 
 | 
 | 
T67 | 
1 | 
 | 
T201 | 
1 | 
 | 
T202 | 
1 | 
| lower_val | 
zero_val | 
auto[1] | 
41819 | 
1 | 
 | 
 | 
T2 | 
100 | 
 | 
T38 | 
600 | 
 | 
T39 | 
55 | 
| zero_val | 
higher_val | 
auto[0] | 
570 | 
1 | 
 | 
 | 
T7 | 
1 | 
 | 
T36 | 
1 | 
 | 
T37 | 
1 | 
| zero_val | 
higher_val | 
auto[1] | 
118 | 
1 | 
 | 
 | 
T52 | 
5 | 
 | 
T53 | 
1 | 
 | 
T17 | 
2 | 
| zero_val | 
lower_val | 
auto[0] | 
530 | 
1 | 
 | 
 | 
T21 | 
1 | 
 | 
T7 | 
2 | 
 | 
T37 | 
2 | 
| zero_val | 
lower_val | 
auto[1] | 
104 | 
1 | 
 | 
 | 
T52 | 
1 | 
 | 
T53 | 
1 | 
 | 
T16 | 
1 | 
| zero_val | 
zero_val | 
auto[0] | 
247 | 
1 | 
 | 
 | 
T2 | 
1 | 
 | 
T38 | 
1 | 
 | 
T67 | 
1 | 
| zero_val | 
zero_val | 
auto[1] | 
169 | 
1 | 
 | 
 | 
T38 | 
2 | 
 | 
T52 | 
2 | 
 | 
T53 | 
4 |