Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10281	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8988	1			T2	17		T37	17		T38	30
len_5001_7500	14123	1			T2	17		T37	17		T38	30
len_2501_5000	9174	1			T2	17		T37	17		T38	30
len_1025_2500	5384	1			T2	10		T37	10		T38	16
len_769_1024	6027	1			T2	2		T21	5		T7	19
len_513_768	6479	1			T2	2		T21	12		T7	29
len_257_512	20925	1			T2	2		T21	12		T7	32
len_0_256	258033	1			T2	290		T21	12		T7	27
len_keccak_block_sizes[72]	706	1			T2	2		T37	2		T38	3
len_keccak_block_sizes[104]	621	1			T2	2		T37	2		T38	3
len_keccak_block_sizes[136]	520	1			T2	2		T37	2		T38	3
len_keccak_block_sizes[144]	416	1			T2	2		T21	1		T37	2
len_keccak_block_sizes[168]	316	1			T38	3		T52	3		T22	1
len_1	763	1			T2	2		T36	2		T37	2
len_0	1217	1			T2	2		T36	8		T37	2