Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	639	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5377	1			T1	12		T3	5		T7	14
len_601_800	11982	1			T1	60		T3	7		T7	38
len_401_600	7981	1			T1	30		T3	5		T7	37
len_201_400	16067	1			T1	22		T3	1		T7	9
len_65_200	72752	1			T1	9		T32	685		T7	6
len_min_for_xof_require_squeeze	987	1			T32	9		T34	1		T72	10
len_keccak_block_sizes[72]	739	1			T32	9		T34	2		T47	1
len_keccak_block_sizes[104]	741	1			T32	9		T47	1		T146	1
len_keccak_block_sizes[136]	741	1			T32	9		T72	5		T192	9
len_keccak_block_sizes[144]	282	1			T34	1		T146	1		T72	5
len_keccak_block_sizes[168]	288	1			T72	5		T157	5		T15	1
len_datapath_width	14013	1			T1	2		T31	3		T32	9
len_2_63	212226	1			T1	13		T2	390		T3	13
len_1	49	1			T149	1		T15	1		T193	1